There is an increasing need to make portable electronic devices smaller, more durable, and more powerful. A variety of electronic memory systems may be used in such devices, including hard drives, electronic memory, and magnetic memory. Conventional hard drives offer high memory capacity, but they are slow, unreliable and power-hungry when compared to silicon-based memory assemblies. Electronic memory assemblies, such as static random access memory chips (SRAM) and dynamic random access memory chips (DRAM), are faster and typically smaller, but the contents of the electronic memory are lost when power to the memory is interrupted.
Magnetic random access memory (or MRAM), uses magnetic, rather than electronic, charges to store bits of data. The use of MRAM chips typically improves the performance of electronic devices by permitting the storage of more information, permitting faster access to stored information, and using lower power consumption than is possible using electronic memory. In addition, MRAM chips retain information when power to the memory is turned off, meaning electronic devices incorporating MRAM chips, such as personal digital assistants, may start up instantly, rather than requiring initialization while software loads to electronic memory.
A typical magnetic memory chip, or die, includes an array of memory cells. The memory cell array may include a layer of magnetic film in which the magnetization is alterable and a layer of magnetic film in which the magnetization is fixed or “pinned” in a particular direction. The magnetic film having alterable magnetization optionally is referred to as a data storage layer or sense layer, and the magnetic film that is pinned optionally is referred to as a reference layer.
Conductive traces (commonly referred to as word lines and bit lines) are typically routed across the array of memory cells. Word lines extend along rows of memory cells, and bit lines extend along columns of memory cells. Because the word lines and bit lines operate in combination to switch the orientation of magnetization of the selected memory cell (i.e., to write the memory cell), the word lines and bit lines optionally are referred to collectively as write lines. Additionally, the write lines optionally are used to read the logic values stored in the memory cell.
Located at each intersection of a word line and a bit line is a memory cell. Each memory cell stores a bit of information as an orientation of a magnetization. The orientation of magnetization of each memory cell will assume one of two stable orientations at any given time. These two stable orientations represent logic values of “1” and “0”.
The orientation of magnetization of a selected memory cell may be changed by the application of an external magnetic field. Supplying electrical current to a word line and a bit line that intersect at the selected memory cell creates the external magnetic field. The electrical currents in the word and bit lines create magnetic fields (also referred to as “write fields”) surrounding the energized word and bit lines that, when combined, can switch the orientation of magnetization (and thus the logic value) of the selected memory cell.
Generally, only the selected magnetic memory cell is subjected to both the word and bit line write fields. Other memory cells coupled to the particular word line generally receive only the word line write field. The magnitudes of the word and bit line write fields are usually selected to be sufficiently high that the chosen magnetic memory cell will switch its logic state only when subjected to both fields, and low enough so that the other magnetic memory cells that are subject only to a single write field (from either the word line or the bit line) are not switched. The undesirable switching of a magnetic memory cell that receives only one write field is commonly referred to as “half-select” switching.
MRAM devices may be subject to error in the presence of stray or externally applied magnetic fields from sources other than the applied write fields. Such stray magnetic fields can originate from a multitude of sources, e.g. external electronic devices such as computers, displays, bar code readers, etc. Such magnetic fields may have a magnitude sufficient to switch the logic state of one or more memory cells in the memory cell array, even in the complete absence of a write field. The use of MRAM devices in environments that are rich in stray magnetic fields has previously been limited, due to the unacceptable levels of memory error that may result.
Memory problems arising from stray magnetic fields may be compounded as memory cell arrays become smaller, and memory cells are more densely packed into the array. Each individual memory cell becomes subjected to greater influence by the magnetic fields of adjacent memory cells and their associated write conductors, increasing the possibility that a stray magnetic field may cause the total magnetic field of an individual memory cell to be changed. It would therefore be advantageous to minimize the effects of stray magnetic fields, particularly where newer die attachment methods may permit MRAM dies to be positioned in close proximity, limiting the space available in the memory assembly for magnetic shielding.